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Contact Name  | Contact Details | Job Title | Company Name |
|---|---|---|---|
GP Gyoungwon Park |  Phone Email | Epi Wafer & Bar Director, Process Engineering |  Leonardo Electronics US |
TY Ts Yang | PhoneEmail | Senior Manager, Wafer Fab Process Engineering |  Onsemi |
PM Phil Mao | PhoneEmail | Manager, Wafer Process & Products Sustaining Engineering |  Diodes |
AS Alan Sidman | PhoneEmail | Manager, Wafer Process Engineering Final Process |  Skyworks |
RD Robert Doherty | PhoneEmail | Manager, Wafer Sort Process Engineering |  Analog Devices |
AA Ala Ahmad | PhoneEmail | Wafer Level Assembly Process Engineer |  Intel |
SA Shahrilibni Ahmad | PhoneEmail | Senior Process Engineer (Wafer Thinning Lamination & Delamination) |  Infineon Technologies |
TK Thielan Kim | PhoneEmail | Wafer Sort Process Engineer | Intel |
SP Shane Parke | PhoneEmail | Wafer Process Engineer | Analog Devices |
AJ Ammon Johnston | PhoneEmail | Wafer Quality & Characterization, Process Integration Yield Enhancement Engineer |  XFAB |
SP Su Phamvu | PhoneEmail | Semiconductor Wafer Fab Process Engineer |  Ostendo Technologies |
AK Arsia Khanfekr | PhoneEmail | Senior Wafer Level Assembly Process Engineer | Intel |
AF Alexis Fernandez | PhoneEmail | Wafer Fab Product Process Engineer |  Micross Components |
RJ Riju James Akkarakaduppil | PhoneEmail | Wafer Level Assembly Process Engineer | Intel |
LT Li-Chih Tsai | PhoneEmail | Wafer Process Engineer |  AOI |
CT Carlos Tan | PhoneEmail | Hbm Pwf Wafer Bond Process and Equipment Senior Engineer |  Micron |
RT Rodolfo Tejing | PhoneEmail | Wafer Prep Process and Qualification Engineer |  UTAC Group |
AY Atsushi Yamamori | PhoneEmail | Global Wafer Fabrication Process & Equipment, Sales-Promotion Plan Engineer |  Renesas Electronics |
SP Shiva Phuyal | PhoneEmail | Wafer Process Engineer | AOI |
HK Hideo Katayose | PhoneEmail | Process Engineer - Wafer Bonding |  Tokyo Electron |