Martin J. Schwartz

Martin J. SchwartzDirector of Hardware Engineering

Schwartz brings to Tenor over 20 years of experience in both design and management of ASIC development and Logic Design.Prior to joining Tenor, Schwartz was a founding member of the Integra Test Division at Teradyne, which generated more than $ 120M in revenue in it be first year of operation, and where he was responsible for the creation and management of the ASIC Development Group.

Schwartz has held design and management positions at Kendall Square Research, Wang Laboratories, Raytheon Company and Digital Equipment Corp where his principal contributions led to many commercially successful leading edge products.He is the holder of several issued patents in Memory System design, Central Processor Unit design, and Semiconductor Test System design.

Schwartz holds at BEE from City College of New York.