Mr. Craig Deaton

Craig Deaton , Texas Instruments

11 : 451 : 00lunch

1 : 001 : 45Verifying a CPU Core

Craig Deaton, Senior Methodologist, Jasper Design

Craig Deaton, Principal Methodology Engineer, Jasper Design Automation

Craig Deaton, Principal Engineer, Jasper Design Automation

Craig Deaton, Texas Instruments
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This presentation by Craig Deaton of Texas instruments and Pandy Kalimuthu WIPRO Technologies explains how they used method port to construct a scoreboard and demonstrate how powerful they are in terms of exchanging information across various eVCs

This presentation by Craig Deaton of Texas instruments and Pandy Kalimuthu WIPRO Technologies explains how they used method port to construct a scoreboard and demonstrate how powerful they are in terms of exchanging information across various eVCs
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Craig Deaton, Texas Instruments

This presentation by Craig Deaton of Texas instruments and Pandy Kalimuthu WIPRO Technologies explains how they used method port to construct a scoreboard and demonstrate how powerful they are in terms of exchanging information across various eVCs
...
Craig Deaton, Texas Instruments

Craig Deaton, Senior Methodologist, Jasper Design Automation, and a founding-company member of the Coverage Interoperability Forum (CIF), now the Unified Coverage Interoperability Technical Subcommittee within Accellera
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Craig Deaton holds the position of Senior Methodologist at Jasper Design Automation.He was the key architect behind Jasper's freely available GamePlanÔ Verification Planner, and is a strong advocate of verification planning in the global verification community.From 1993 until 2005, Mr. Deaton held positions of increasing verification responsibility at Texas Instruments.In his role as an ASIC verification engineer, he served on TI-wide methodology teams and was a key reviewer of new vendors / tools.He also served as the formal verification leader for TI Wireless in Dallas and consulted with major EDA vendors on technical decisions affecting their product roadmaps.Mr. Deaton has presented papers and served on expert panels at professional forums and is a founding-member company contributor to the Coverage Interoperability Forum (CIF).He received his BSEE from the University of Arkansas.

By Kavita Snyder, Craig Deaton, and Doug Smith, Jasper Design Automation
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Craig Deaton is senior methodologist at Jasper Design Automation. He was the key architect behind Jasper's freely available GamePlan™ Verification Planner, and is a strong advocate of verification planning in the global verification community. From 1993 until 2005, Mr. Deaton held positions of increasing verification responsibility at Texas Instruments. In his role as an ASIC verification engineer, he served on TI-wide methodology teams and was a key reviewer of new vendors and tools. He also served as the formal verification leader for TI Wireless in Dallas.