Tony Chiang, Vice President of Engineering at Bay Microsystems said, "We are very happy with our choice of SynTest, as our DFT partner.
By providing exemplary DFT services, and installing their tools at our site, they enabled us to test various modules on command, drastically reducing down time and maximizing our productivity.
The compact ATPG patterns generated by SynTest's
TurboScan-ATPG software allowed us to reduce time-to-market . using ATE to test the structural reliability of our chip design."
Dr. L.T. Wang, President, SynTest, "We would like to congratulate Bay Microsystems, Tony
We are very honored and happy that Tony
confidence in SynTest
and that we were able to contribute to their success.
Used SynTest's DFT Tools and Services
To ensure a predictable outcome and eliminate potential design flaws at the last minute, and to achieve high fault coverage, Bay Microsystems
chose to use DFT methodology for a scan-based design from the very beginning.
It selected SynTest's TurboScan™
scan insertion and ATPG tool, and SynTest's
services, as well as SynTest's Turbo BSD™, for boundary scan synthesis, to facilitate the testing of its memory BIST and full scan chains on multiple-linked modules.
Tony Chiang noted, "With the goal of minimizing the drain on our internal resources, we decided to look for a partner with a complete set of proven and easy-to-use DFT tools, who could support our efforts.