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This profile was last updated on 3/11/13  and contains information from public web pages.
 
Background

Employment History

  • Group Director
    Synopsys Inc
  • Group Director, CAE
    Implementation Group

Education

  • MBA
    San Jose State University
  • a B.S. degree , Electrical Engineering
    University of California , Berkeley
Web References
Tom ...
www.synopsys.com, 5 June 2009 [cached]
Tom Chau
Tom Chau is group CAE director for Synopsys’s power/rail analysis and library characterization products and has been with Synopsys since 1995. Tom has more than 23 years combined semiconductor and EDA industry experience and is responsible for strategic customers’ reference flow development with the focus on low power design. Tom received a B.S. degree in Electrical Engineering from University of California, Berkeley and a MBA from San Jose State University.
ARM & Synopsys Luncheon
www.synopsis.com, 3 June 2005 [cached]
Tom Chau, Synopsys Group Director, CAE
Synopsys EDA Interoperability Developers' Forum Presentations - October 2007
www.analogy.com, 1 Oct 2007 [cached]
Tom Chau, Group Director, CAE, Implementation Group, Synopsys
ICC Faster Power/Ground Grid Closure
www.synopsys.com, 6 April 2009 [cached]
Tom Chau
Tom Chau is group CAE director for Synopsys’s power/rail analysis and library characterization products and has been with Synopsys since 1995. Tom has more than 23 years combined semiconductor and EDA industry experience and is responsible for strategic customers’ reference flow development with the focus on low power design. Tom received a B.S. degree in Electrical Engineering from University of California, Berkeley and a MBA from San Jose State University.
Design Practices: Ensuring low-power design success at 65nm
www.eetasia.com, 1 Jan 2006 [cached]
By Tom Chau and Cheng Shi
...
Tom Chau is the group director of corporate application engineering for RTL-to-GDS flow and methodology at Synopsys Inc.
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