A strong focus on packaging was also in evidence in 2011, with a session featuring John Waite (GLOBALFOUNDRIES), Raj Pendse (STATS ChipPAC), Robert Darveaux (Amkor), and Nick Yu (Qualcomm).
• Robert Darveaux
presented "Supply Chain Challenges for 3D Integration of Memory and Logic Devices using TSVs."
Raj Pendse, VP of product and technology marketing at STATS ChipPAC and Robert Darveaux, CTO of Amkor, covered this supply chain integration from the dedicated packaging house perspective.
spoke on "Supply Chain Challenges for 3D Integration of Memory and Logic Devices using TSVs."
compared the relative ease of sourcing, assembly, and test of package-on-package (POP) with the challenges of TSV: difficult to test high-density area array contact pads or bumps; bare or partially assembled memory and logic die that are difficult to burn in adequately; a newer joining technology not widely available to OEMs and contract assemblers; a poorly characterized joining process yield; and, due to the immaturity of the test, burn-in, and assembly; unclear ownership of defect liability.
SOURCE: Robert Darveaux, Amkor Technology.
These problems cannot be resolved by technologies or business models alone, he
TSV processes can be standardized and characterized, with the resource-sharing model of consortia or the faster but potentially messy supply chain collaboration on specific projects.