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2015-12-20T00:00:00.000Z

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Mats Löfling

ASIC Management

Stealth-mode StartUp company

Stealth-mode StartUp company

Background Information

Employment History

Director NPU ASIC&HW
Marvell Semiconductor Inc

Vice President of Engineering
Xelerated Corporation

Vice President of Engineering
LSI Logic Corporation

Education

Master's Degree
Electrical Engineering
Royal Institute of Technology

Web References (18 Total References)


Mats Löfling Vice ...

www.xelerated.com [cached]

Mats Löfling Vice President and Head of ASIC and Hardware Development

Mats Löfling has more than 20 years of ASIC experience, in engineering, project management and management positions. He is responsible for some 30 chip tape-outs, undertaken in several companies and geographies. Mats has managed Xelerated's ASIC activities from the X10q and X11 developments until current HX and AX families. Before joining Xelerated he held positions within ASIC development at Ericsson and at LSI Logic. Mats Löfling holds a Master's Degree in Electrical Engineering from the Royal Institute of Technology in Stockholm, Sweden.


Mats Lofling, VP of ...

www.insidechips.com [cached]

Mats Lofling, VP of engineering (ex-Ericsson and LSI Logic)


Management Team - Xelerated

www.xelerated.com [cached]

Mats Löfling

Vice President ASIC & Hardware Development


Management Team - Xelerated

www.xelerated.com [cached]

Mats Löfling Vice President, ASIC & Hardware Development

Mats Löfling has more than 20 years of ASIC experience, in engineering and management positions. He is responsible for some 30 chip tape-outs, undertaken in several geographies, most recently the Xelerated X10q and X11 network processors.
...
Mats Löfling holds a Master's Degree in Electrical Engineering from the Royal Institute of Technology in Stockholm, Sweden.


Magma Investor Relations - Magma Announces Talus Design 1.1 and Talus RTL 1.1 -- Enhanced Synthesis Products Deliver New Capabilities, Reference Flows and Interfaces

investor.magma-da.com [cached]

"We use Magma's complete RTL-to-GDSII solution, including Talus Design," said Mats Löfling, vice president ASIC and Hardware Development for Xelerated, a leading provider of high-performance network processors.

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